HAINS Gaétan Joseph Daniel Robert
LACL, Université Paris East, Créteil, France
Scalable parallel programming: hardware, algorithms and applications
Time & Date: 5pm – 6pm, Monday, August 25th, 2014
Location: EME 1202, UBCO, Kelowna Campus, Kelowna
Talk Abstract: We will present and explain the Bulk-Synchronous Parallel (BSP) model of
parallel computation. BSP was invented in 2009 by Leslie Valiant and has been applied to almost every possible parallel algorithm, parallel hardware and parallel software application. BSP allows a clean and portable understanding of how parallel hardware can «couple» efficiently or not with big data and large-scale simulations.
We outline categories of applications where infinite scalability is either, easy, conditional and
complex or mostly impossible. Measured machine parameters allow performance prediction for computations of unlimited size in many application areas.
Speaker Biography: HAINS Gaétan Joseph Daniel Robert, Computer Scientist. Education: BSc,
honours, 1985; MSc, 1987, D.Phil., 1990. Appointments: Researcher, CRIM Montreal, 1989;
Assistant Professor, Associate Professor, University of Montreal, 1989-95; Visiting Professor
ENS Lyon, 1994; Visiting Researcher, Fujitsu-ISIS, Japan, 1994-95; Professor, 1995-, Director,
2000-05, 1st class professor 2004-, Laboratoire d’informatique fondamentale d’Orleans,
University of Orleans; Programme Officer, Software research programs at Agence Nationale de
la Recherche (ANR) 2005-06; Professor 2006-, Director 2007-, Laboratoire d’Algorithmique,
Complexité et Logique, Université Paris 12. Honours: Commonwealth Scholar, 1986-89; IISF
Visiting Scholarship, 1992. Address: LACL, Université Paris East, 94000 Créteil, France.
Outstanding Scientists of the 21st Century, S. Rains ed., First edition, International Biographical
Centre, Ely, Cambridgeshire UK, 2007.
Refreshments will be provided. For further information please contact:
Youry Khmelevsky (email: youry at ieee.org)